The present invention relates to a semiconductor integrated circuit device, and more particularly to a semiconductor integrated circuit device having a device-protecting insulating film of 1.0 .mu.m or more in thickness on a device.
The progress in insulated gate field effect transistor integrated circuits (hereinafter called MOS IC) towards the realization of a high degree of circuit integration and high operation speed has been remarkable, and these operation speeds are gradually approaching the range of bipolar IC's.
Generally in a MOS IC, operational speed is largely governed by channel lengths L and dissipated currents of individual MOS transistors forming the integrated circuit, and as the lengths L are shorter and the operation currents are larger, it becomes operable at a higher speed. This implies that upon design and manufacture of a MOS IC operable at a high speed, a finer pattern should be formed, and ground or power supply wirings having larger current capacities, that is, ground or power supply wirings having broad widths, are necessitated.
In the case where an IC is constructed of MOS transistors having short channel lengths (4 .mu.m or less) for the purposes of realizing high speed and large-scale integration, it was discovered that in addition to the fact that a slight error in patterning would result in variations of characteristics, the reliability of the device, as compared to that of a transistor having a longer channel length L (5 .mu.m or more), is extremely sensitive to minute amounts of contamination ions.
Variations in characteristics caused by external contamination also arise in the process of assembling a MOS IC. The mechanism by which these variations in characteristics occur can be explained in the following manner.
Among the materials generally used for assembly are low-melting-point glass and plastics. Since these materials consist of various compounds, they are of high impurity as compared to the materials used in a diffusion manufacturing process of a MOS IC chip, and thus contain contamination substances which cause variations in characteristics. On the other hand, it is a common practice to provide an insulating film over the surface of an integrated circuit device for the purpose of protecting the device from contamination as well as from undesirable mechanical forces. However, in the event that this insulating film consists of a silicon dioxide (SiO.sub.2) film of about 0.5.about.1 .mu.m in thickness, if a contamination substance should be deposited onto the surface of such an insulating film, during the heat treatment in the assembly process, heavy ions emanating from the contamination substance diffuse through the insulating film and reach the gate region of the MOS transistor, resulting in variations in the threshold voltage, and attendant unacceptable characteristics in the MOS IC. In a MOS IC which has become unacceptable due to the above-mentioned cause, since the contamination ions move at a high temperature, the environmental condition of use will determine the extent of threshold voltage variations, thereby lowering the overall reliability of the device.
With regard to a method for obviating the problem in reliability caused by the above-described mechanism, it has been discovered that if phospho-silicate glass of several mol% in concentration is used as an insulator for protecting the device, and the thickness of the insulating film is selected to be 1 .mu.m or more, the resulting insulating film will protect the device from the contamination ions. This is caused by the fact that since the phosphorus contained in phospho-silicate glass serves as a getter for the contamination ions applied externally, the contamination ions are not mobile under the subsequent influence of heat or an electric field. In other words, if a phospho-silicate glass film of 1 .mu.m or more in thickness is used as a protective film, the resulting MOS IC will have a high reliability against external contamination. However, phospho-silicate glass has an extremely large grain size when it is grown on wiring metals such as on aluminum (Al) or aluminum-silicon alloy, and if the surface of the metal is large, the stress between grains will also become unacceptably high. If the film thickness becomes 1.about.1.5 .mu.m or more, cracks or faults are generated in the phospho-silicate glass or silicon dioxide film. These faults do not occur when the width of a metallic wiring is narrow, but they are generated on a broad wiring such as a ground or power supply wiring. Moreover, in the contemplated MOS IC operable at a high speed, since the current capacity is to be great due to the large operating current requirements as described previously, a power supply or ground wiring having such a broad width is necessitated, thereby enhancing the possibility of incurring such faults.
The ground or power supply wiring layer extends from the bonding pad to about 50.about.250 .mu.m distance in the broad width state, and separates to narrower width wiring layers for connecting to the circuit elements such as MOS transistors. The above-described faulting problem occurs in the area between the bonding pad and a point remoted from the bonding pad of about 50.about.250 .mu.m.